Arch²Neu Project

Neuromorphic hardware and software environment for versatile computing



Research Summary

Context

The last years have witnessed a dramatic change in the area of computing architectures. Severe technology constraints, especially power and defects issues, are forcing computer architects to reevaluate, possibly drastically, the nature of processors and architectures. In that context, heterogeneous architectures, composed of many accelerators and many cores, are becoming increasingly relevant for both embedded and general-purpose computing.

At the same time, high performance architectures inspired from the nervous system and hence called “neuromorphic architectures”, have appeared during the past two decades. These architectures can emulate with silicon technology the behaviour of a biological neuron.

Our research

Our research aims at designing a versatile neuromorphic computing machine. We develop a programmable architecture based on analog spiking neurons. Signal-processing tasks are modularly decomposed into elementary operators, which are efficiently implemented using analog spiking neurons as building blocks. Since the behaviour of a neural network is determined by its connectivity pattern, we assign to an ensemble of neurons a specific connectivity in order to perform a specific function, or operator. We are thus able to build a library of functions that can be executed by this architecture, and a compilation toolchain allowing simple programming of the system. In the case where silicon defects preclude straightforward assembly of neurons into operators, learning techniques can be used to correct or implement operators. From the user’s point of view, this machine is as simple to program as a classical microprocessor.

Stacking hardware and software to build a complete machine Hardware and software components of a neuromorphic computing machine.

The expected advantages of such a system are:

  1. robustness to silicon defects, both at fabrication time and during circuit lifetime
  2. low power consumption for certain classes of applications
  3. scalability of system architecture and programming